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Responses to ESD plan: state of shock

1. Letter to the editor: Group responds to ESD confusion

2. Letter to the editor: ESD a moving target
 

 
Letter to the editor: Group responds to ESD confusion

 

(05/11/2007 1:04 PM EDT)
URL: http://www.eetimes.com/showArticle.jhtml?articleID=199501123
 
Dear Editor:
 

The Industry Council on ESD Target Specifications would like to respond to the recent article entitled, ''ESD plan: state of shock'' by Mark LaPedus, that appeared in the May 7th publication of EE Times.

The article reported on the efforts by the Council in its recommended proposal for a general reduction of ESD levels to safely meet IC chip manufacturability. These efforts have become necessary when the chip suppliers noted that the present ESD specifications are drastically impeding the on-time delivery of products as well as making it increasingly difficult to design high speed and high performance integrated circuits.

While the Council is especially grateful to the EE Times for generously addressing this very important topic, we would respectfully like to point out some critical statements and omissions which could otherwise lead to wrong perceptions.

First, the article gave the impression that the Council members are not unanimous in support of their own findings. The Council, consisting of leading experts from 16 major semiconductor suppliers, as well as IC production control experts, test equipment leaders, and IP suppliers for ESD protection, would like to state that all members are in complete agreement for the need and urgency in reducing the required ESD levels.

Second, and the most critical aspect, is that basic factory control of ESD, rather than on-chip design techniques, is the most effective manner in which IC reliability and process yields can be maintained and ensured. Factory Control is the primary reason for lack of field returns for products operating well below the currently recommended ESD levels. The full supporting data and arguments for this position will be contained in the Industry Council's White Paper to be published by August 2007.

Next, the article causes further confusion by not differentiating between Component Level ESD targets (which can be safely lowered) and System Level ESD targets (which need to be maintained at the current levels) for overall IC reliability.

The findings and conclusions are supported by the quality management of each Council member company, and the recommendations are beginning to get favorable acceptance from the customers who are equally eager to receive high performance products that are guaranteed to be safe in the field.

Yours truly,
 

On Behalf of the Industry Council on ESD
Charvaka Duvvury, Texas Instruments
Harald Gossner, Infineon Technologies
Jim Miller, Freescale
Koen Verhaege, Sarnoff Europe

 

 

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Letter to the editor: ESD a moving target



(05/25/2007 12:33 PM EDT)
URL: http://www.eetimes.com/showArticle.jhtml?articleID=199702248

Editor,

I enjoyed reading your article, "ESD Plan: State of Shock" on attempts to get OEM's to swallow lower ESD ratings. The "Industry Council on ESD Target Levels" sounds alot like the automotive industry moaning about gas mileage CAFE standards. For those who are relatively new to ESD design and development, or perhaps have narrower perspective on the issue, should be reminded of certain reocurring themes that drive this engineering specialty:

Disasters and technology changes. ESD and associated reliability disasters that happened in the 1980's were usually a result of poor IC design techniques, and the advent of marginally designed processes using lightly doped drain MOS technology. Does anyone remember what happened to Performance Semiconductor?

ESD is largely a scorecard for executive management for it takes a high level of commitment to plan for ESD and force disparate engineering (design and process) groups to work together. While we have been given a bit of a respite in the 0.35- to 130-micron processes, we may not be as fortunate in the future as technology changes once again, and more companies embrace the "fab light" or "fabless" business model.

Inconsistent ESD test results. ESD and latchup results are straight forward, tangible benchmarks OEM's use to evaluate the reliability of a costly IC product. IC products that make the grade hold their average selling prices longer, and promote customer loyalty as customers know good results are hard to achieve. In the old days, different "MIL STD" ESD testers even with the same model number and manufacturer gave different results, hence some guardband was necessary. The same is true today.


While ESD tester calibration methods have improved over the years, IC pin count has increased dramatically, pushing up test complexity (and cost.) ESD test specifications also seem to be "zap happy" as well. For instance, a SOC mixed signal IC with 800 bumps, 25 supplies, 14 grounds, and 300 I/O and can be stressed over 24,000 times in the 7 hours it takes to run the ESD test (on a single part.) ESD tester manufacturers also have difficultly finding or making a good mercury switch for this application. These factors, and others ensure ESD test inconsistency issues will always be with us no matter what the ESD specification level is.

Sincerely Yours,
Rosario Consiglio
President
Impulse Semiconductor Inc.