Freescale demonstrates CMOS tech with strained SOI substrates
Posted: 14 Jun 2006               

Freescale Semiconductor demonstrated an advanced CMOS technology that utilizes strained silicon-on-insulator (SOI) substrates—a breakthrough that could deliver performance improvements and reduced power consumption for next generation semiconductor devices.

Made possible by novel hybrid strain techniques, the technology offers the performance of SOI with the enhanced carrier mobility of strained silicon, the company said. In addition, transistors based on this technology exhibit performance increases greater than 30 percent over conventional technology. These increases can in turn reduce active power consumption by more than 40 percent while maintaining performance levels.

"The need to control both active and standby power consumption while continuing to improve transistor performance is driving the industry to develop creative, non-traditional scaling techniques," said Suresh Venkatesan, Freescale's director of Austin silicon technology solutions. "Freescale is breaking new ground by incorporating innovative materials, structures and processes into our transistor roadmap as evidenced by this strained SOI technology breakthrough."

Freescale is evaluating the technology for the 45nm node and beyond. Initial applications for strained SOI from may include power-sensitive and high-performance products such as advanced networking equipment and gaming consoles. The technology could also eventually help the company's customers create dramatically smaller and more powerful entertainment electronics and intelligent portable devices.

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