LONDON — Intel’s 65-nanometer process, as used with the Pentium D 920 920 dual-core processor, makes use of antifuse devices, according to Semiconductor Insights Inc., a Canadian engineering consultancy.
Semiconductor Insights (Ottawa, Ontario) said that as far as it knows this is the first time Intel has included antifuse technology in any of its processes.
Intel Corp. (Santa Clara, Calif.) is believed to have used laser-blown metal fuses in the past to create multiple variations of a processor from a single die; for example using a fuse to disconnect areas of SRAM caches. The advantage of using an anti-fuse is that the chip can be characterized and given its identity electrically during a testing process.
Antifuses, typically made using amorphous silicon, are normally high resistance links which are programmed with a current to produce a lower-resistance link — hence the term antifuse as this is the opposite of blowing a fuse.
In the early use of antifuses there was debate about their reliability, particularly as there was no well-defined understanding of the process whereby the devices changed. However antifuses have been used for many years in field programmable gate arrays. They have the advantage of taking up very little space compared with transistor-based non-volatile elements.
Semiconductor Insights is producing a report based on an examination of each level of the Intel 65-nanometer fabrication process from passivation to wells. The report is examining PMOS and NMOS transistors in terms of size and the use of germanium to produce strain and improve mobility. Special emphasis is also being placed on the structure and materials used to create the anti-fuse programmable elements, the consultancy said.
“The antifuse appears to be in use with cache memory arrays,” said Geoffrey MacGillivray, technology manager memory at Semiconductor Insights. He added that they could be used to switch in additional memory later in the design’s life cycle or they could be there to enable cache redundancy. “We’re not sure which, but we think we’ve found more cache memory than was specified with the chip.”
MacGillivray said that as far as the engineering firm had determined so far, the antifuse is not in use in the datapath but only as a control element to do some coarse-grained switching.
“They are not easy to spot so we can never be sure that we have found them all. They are not being used in the datapath as far as we can tell; but that’s no guarantee. But they are being used next to SRAM cache memory,” MacGillivray said.
