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Samsung looks to 60nm to drive Gbit DRAM acceptance

Semiconductor FabTech                                                                                                                                    Thursday, 01 March 2007
Samsung Electronics says that it has begun mass producing the industry's first 1Gbit (Gb) DDR2 DRAM (dynamic random access memory) using 60nm-class process technology. The 60nm process is expected to become the mainstream circuit technology for DRAM in 2008. In the first year of market availability alone, 60nm DRAM revenues are expected to reach $2.3billion worldwide and further increase to $32 billion by 2009.

Use of the new process technology increases production efficiency by 40% over the 80nm process technology deployed in DRAM fabrication since early 2006, and offers twice the productivity of 90nm general process technology, the company says.

Samsung reports that below 90nm it has relied heavily on the company's extensive use of three-dimensional (3D) transistor technologies to build increasingly smaller chips, unlike many companies that continue to use planar architectures. One of the key technologies involved in the development of Samsung's 3D transistor is a recess channel array transistor (RCAT) that builds the DRAM cell three-dimensionally to minimize its size while increasing its density.

The 3D transistor technology doubles the refresh cycle, which is critical for enabling efficient fabrication on a nanometer-scale. Samsung has been using RCAT for DRAM fabrication from 90nm. The company expects this 3D technology to take DRAM fabrication to 50nm and lower (according to Moore's law and Samsung's reported performance that is 1-2 years away with the development work already announced in October 2006).

Samsung also uses of metal-insulator metal (MIM) for its capacitors to provide enhanced data storage in its sub-70nm designs and a selective epitaxial growth (SEG) technology to make for a broader electron channel and optimum charge carrier speeds to reduce power consumption and enable higher performance.

The company hopes that market availability of 1Gb DRAM will further increase the demand for large density DRAMs, particularly with the Vista operating system imposing a DRAM requirement of at least 1Gbyte (GB). Samsung's line up of 60nm 1Gb DRAM-based modules includes 512Mb, 1Gb and 2Gb densities supporting either 667Mbps or 800Mbps speeds with customer validation. Samsung anticipates such a high degree of receptivity to the 60nm process that it should drive greater demand for 1Gb DRAM chips in the near future over today's mainstream density of 512Mb.

By Dr Mike Cooke

 

Samsung begins volume producing 60nm DRAM

Press release, March 1; Michael McManus, DigiTimes.com                                                                                                  [Thursday 1 March 2007]

Samsung Electronics announced today that it has begun mass producing the industry’s first 1Gb DDR2 DRAM using 60nm–class process technology. Use of the new process technology is a significant milestone in that it increases production efficiency by 40% over the 80nm process technology deployed in DRAM fabrication since early 2006, and offers twice the productivity of 90nm general process technology.

Ample market availability of 1Gb DRAM will further increase the demand for large density DRAMs, especially as the new premium Vista operating system imposes a DRAM requirement of at least 1GB. Samsung’s line up of 60nm 1Gb DRAM-based modules includes 512MB, 1GB and 2GB densities supporting either 667Mbps or 800Mbps speeds with customer validation.

Samsung anticipates such a high degree of receptivity to the 60nm process that it should drive greater demand for 1Gb DRAM chips in the near future over today’s mainstream density of 512Mb.

Samsung’s continuous technology migration below 90nm has relied heavily on the company’s extensive use of three-dimensional (3D) transistor technologies to build increasingly smaller chips. One of the key technologies involved in the development of Samsung’s 3D transistor is a recess channel array transistor (RCAT) that actually builds the DRAM cell three-dimensionally to minimize its size while increasing its density.

This new 3D transistor technology doubles the refresh cycle, which is critical for enabling efficient fabrication on a nanometer-scale. Samsung has been utilizing RCAT for DRAM fabrication from 90nm. This key 3D technology is expected to enable DRAM fabrication to 50nm and lower.

In addition to its 60nm process technology innovation, Samsung’s use of metal-insulator metal (MIM) for its capacitors provides enhanced data storage in sub-70nm designs.

The 60nm 1Gb DDR2 DRAM was first developed by Samsung in 2005 and in October of last year, the company announced it has also developed DRAM produced on 50nm process technology.

The 60nm process is expected to become the mainstream circuit technology for DRAM in 2008. In the first year of market availability alone, 60nm DRAM revenues are expected to reach US$2.3 billion worldwide and further increase to US$32 billion by 2009.